You are here: irt.org | FOLDOC | Very Efficient Speculative Parallel Architecture
<project> (VESPA, Portuguese for "wasp") An Edinburgh University project using speculative multithreading to improve single-application and multiprogramming performance, and to increase fault tolerance and reliability. The project aims to develop a compilation environment to generate efficient speculative parallel code, including speculative parallelisation and speculative helper threads. Other research involves the development of optimized thread-level speculative architectures and novel uses of speculative multithreading, such as fault-tolerance.
VESPA Home (http://homepages.inf.ed.ac.uk/mc/Projects/VESPA/vespa.html).
(2008-04-04)
Nearby terms: Vertical Redundancy Check « vertical refresh rate « vertical scan rate « Very Efficient Speculative Parallel Architecture » Very high bit-rate Digital Subscriber Line » Very Large Database » Very Large Memory
FOLDOC, Topics, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S, T, U, V, W, X, Y, Z, ?, ALL